Espressif Systems /ESP32-S2 /GPIO /PIN12

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Interpret as PIN12

Description

Configuration for GPIO pin 12

Fields

SYNC2_BYPASS	For the second stage synchronization, GPIO input data can be syn- chronized on either edge of the APB clock. 0: no synchronization; 1: synchronized on falling edge; 2 and 3: synchronized on rising edge.
PAD_DRIVER	Pad driver selection. 0: normal output; 1: open drain output…
SYNC1_BYPASS	For the first stage synchronization, GPIO input data can be synchro- nized on either edge of the APB clock. 0: no synchronization; 1: synchronized on falling edge; 2 and 3: synchronized on rising edge.
INT_TYPE	Interrupt type selection. 0: GPIO interrupt disabled; 1: rising edge trigger; 2: falling edge trigger; 3: any edge trigger; 4: low level trigger; 5: high level trigger. (R/W)
WAKEUP_ENABLE	GPIO wake-up enable bit, only wakes up the CPU from Light-sleep.
CONFIG	Reserved
INT_ENA	Interrupt enable bits. bit13: CPU interrupt enabled; bit14: CPU non-maskable interrupt enabled.

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